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| PRELIMINARY INFORMATION ICS503 LOCOTM PLL Clock Multiplier Features * Packaged as 8 pin SOIC or die * ICS' lowest cost PLL clock family * Generates 16.9344 MHz for stereo codecs from the 14.31818 MHz motherboard clock * Can be cost effective in replacing a single surface-mount crystal * Can be driven by other 5xx series * Input crystal frequency of 5 - 27 MHz * Input clock frequency of 2 - 50 MHz * Output clock frequencies up to 160 MHz * Low jitter - 50 ps one sigma * Duty cycle of 45/55 up to 160 MHz * Operating voltages of 3.0 to 5.5V * Full CMOS level outputs with 25mA drive capability at TTL levels * Advanced, low power CMOS process Description The ICS503 is a member of the LOCOTM family, the most cost effective way to generate a high quality, high frequency clock output from a low frequency crystal or clock input. The name LOCO stands for LOw Cost Oscillator, as it is designed to replace crystals and crystal oscillators in most electronic systems. Using Phase-Locked-Loop (PLL) techniques, the device uses a standard fundamental mode, inexpensive crystal to produce output clocks up to 160 MHz. Stored in the chip's ROM is the ability to generate 9 different multiplication factors, allowing one chip to be used in two or three different applications (see page 2). Block Diagram VDD GND S0 S1 Crystal or clock input X1/ICLK Crystal Oscillator X2 PLL Clock Multiplier Circuitry and ROM Output Buffer CLK Optional crystal capacitors MDS 503 A 1 Revision 111000 Integrated Circuit Systems, Inc. * 525 Race Street * San Jose *CA*95126*(408) 295-9800tel * www.icst.com PRELIMINARY INFORMATION ICS503 LOCOTM PLL Clock Multiplier Pin Assignment X1/ICLK VDD GND NC 1 2 3 4 8 7 6 5 X2 S1 S0 CLK Clock Decoding Table (MHz) S1 0 0 0 M M M 1 1 1 S0 0 M 1 0 M 1 0 M 1 Multiplier Typical Input (MHz) CLK (MHz) Input Range (MHz) at 5V Input Range (MHz) at 3.3V 10 10 100 2 Input 16 2 Input 10 16 10 160 2 Input 10 2 Input 6 1.1111 27 30.00 20 Input 50 20 Input 40 2.4444 14.31818 35.00 10 Input 50 10 Input 40 2.4164 14.31818 34.60 10 Input 50 10 Input 40 2.4 14.31818 34.36 10 Input 50 10 Input 40 5.5873 14.31818 80.00 14 Input 28 14 Input 18 1.1827 14.31818 16.934 14 Input 30 14 Input 30 4.1905 14.31818 60.00 5 Input 38 5 Input 24 0 = connect directly to ground, 1 = connect directly to VDD, M = leave unconnected (floating). Pin Descriptions Number 1 2 3 4 5 6 7 8 Name X1/ICLK VDD GND NC CLK S0 S1 X2 Type I P P O TI TI O Description Crystal connection or clock input. Connect to +3.3V or +5V. Connect to ground. Nothing is connected to this pin. Clock output per Table above. Output frequency equals input frequency times multiplier. Select 0 for output clock. Connect to GND or VDD or float. Select 1 for output clock. Connect to GND or VDD or float. Crystal connection. Leave unconnected for clock input. Key: I = Input, TI = Tri-Level Input, O = output, P = power supply connection MDS 503 A 2 Revision 111000 Integrated Circuit Systems, Inc. * 525 Race Street * San Jose *CA*95126*(408) 295-9800tel * www.icst.com PRELIMINARY INFORMATION ICS503 LOCOTM PLL Clock Multiplier Maximum 7 VDD+0.5 VDD+0.5 70 260 150 5.5 (VDD/2)-1 0.5 Units V V V C C C V V V V V V V V mA mA pF MHz MHz MHz MHz ns ns % ps ps Electrical Specifications Parameter Conditions Minimum Typical ABSOLUTE MAXIMUM RATINGS (stresses beyond these can permanently damage the device) Supply Voltage, VDD Referenced to GND Inputs Referenced to GND -0.5 Clock Output Referenced to GND -0.5 Ambient Operating Temperature 0 Soldering Temperature Max of 10 seconds Storage temperature -65 DC CHARACTERISTICS (VDD = 5.0V unless otherwise noted) Operating Voltage, VDD 3 Input High Voltage, VIH, ICLK only ICLK (Pin 1) (VDD/2)+1 VDD/2 Input Low Voltage, VIL, ICLK only ICLK (Pin 1) VDD/2 Input High Voltage, VIH S1, S0 VDD-0.5 Input Low Voltage, VIL S1, S0 Output High Voltage, VOH, CMOS high IOH=-4mA VDD-0.4 Output High Voltage, VOH IOH=-25mA 2.4 Output Low Voltage, VOL IOL=25mA IDD Operating Supply Current, 14 MHz crystal No Load, 80MHz 16 Short Circuit Current CLK output 70 Input Capacitance, S1, S0 Pins 6, 7 4 AC CHARACTERISTICS (VDD = 5.0V unless otherwise noted) Input Frequency, crystal input See table on page 2 5 Input Frequency, clock input See table on page 2 2 Output Frequency VDD = 4.5 to 5.5V 14 Output Frequency VDD = 3.0 to 3.6V 14 Output Clock Rise Time 0.8 to 2.0V 1 Output Clock Fall Time 2.0 to 0.8V 1 Output Clock Duty Cycle at VDD/2 45 49 to 51 Absolute Clock Period Jitter Deviation from mean 120 One Sigma Clock Period Jitter 50 0.4 27 50 160 100 55 MDS 503 A 3 Revision 111000 Integrated Circuit Systems, Inc. * 525 Race Street * San Jose *CA*95126*(408) 295-9800tel * www.icst.com PRELIMINARY INFORMATION ICS503 LOCOTM PLL Clock Multiplier External Components / Crystal Selection The ICS503 requires a 0.01F decoupling capacitor to be connected between VDD and GND. It must be connected close to the ICS503 to minimize lead inductance. No external power supply filtering is required for this device. A 33 terminating resistor can be used next to the CLK pin. The total on-chip capacitance is approximately 6 pF, so a parallel resonant, fundamental mode crystal should be used. If exact tuning of the frequency is required, crystal capacitors should be connected from each of the pins X1 and X2 to ground as shown in the Block Diagram on page 1. The value (in pF) of these crystal caps should be equal to (CL -6)*2, where CL is the crystal load capacitance in pF. These external capacitors are only required for applications where the exact frequency is critical. For a clock input, connect to X1 and leave X2 unconnected (no capacitors on either). Package Outline and Package Dimensions 8 pin SOIC E Pin 1 H Symbol A b D E H e h Q Inches Min Max 0.055 0.068 0.013 0.019 0.185 0.200 0.150 0.160 0.225 0.245 .050 BSC 0.015 0.004 0.01 Millimeters Min Max 1.397 1.7272 0.330 0.483 4.699 5.080 3.810 4.064 5.715 6.223 1.27 BSC 0.381 0.102 0.254 D Q e b c h x 45 A Ordering Information Part/Order Number ICS503M ICS503MT Marking ICS503M ICS503M Package 8 pin SOIC 8 pin SOIC on tape and reel Temperature 0-70C 0-70C While the information presented herein has been checked for both accuracy and reliability, ICS/MicroClock assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by ICS/MicroClock. ICS/MicroClock reserves the right to change any circuitry or specifications without notice. ICS/MicroClock does not authorize or warrant any ICS/MicroClock product for use in life support devices or critical medical instruments. LOCO is a trademark of ICS MDS 503 A 4 Revision 111000 Integrated Circuit Systems, Inc. * 525 Race Street * San Jose *CA*95126*(408) 295-9800tel * www.icst.com |
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